Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort

Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort

10.1109/ICECS46596.2019.8964789

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Bibliographic Details
Main Authors: ORAZIO AIELLO, Paolo Crovetti, AYUSHPARTH SHARMA, ALIOTO,MASSIMO BRUNO
Other Authors: ELECTRICAL AND COMPUTER ENGINEERING
Format: Article
Published: IEEE 2021
Subjects:
Fully-synthesizable
standard cell-based
Analog-to- Digital Converter
Current sensing
low design effort
low area
Online Access:https://scholarbank.nus.edu.sg/handle/10635/189170
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Institution: National University of Singapore
id sg-nus-scholar.10635-189170
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spelling sg-nus-scholar.10635-1891702024-04-16T12:15:31Z Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort ORAZIO AIELLO Paolo Crovetti AYUSHPARTH SHARMA ALIOTO,MASSIMO BRUNO ELECTRICAL AND COMPUTER ENGINEERING Fully-synthesizable standard cell-based Analog-to- Digital Converter Current sensing low design effort low area 10.1109/ICECS46596.2019.8964789 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) 2021-04-12T08:46:20Z 2021-04-12T08:46:20Z 2020-01-23 Article ORAZIO AIELLO, Paolo Crovetti, AYUSHPARTH SHARMA, ALIOTO,MASSIMO BRUNO (2020-01-23). Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort. 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS). ScholarBank@NUS Repository. https://doi.org/10.1109/ICECS46596.2019.8964789 https://scholarbank.nus.edu.sg/handle/10635/189170 CC0 1.0 Universal http://creativecommons.org/publicdomain/zero/1.0/ IEEE
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
topic Fully-synthesizable
standard cell-based
Analog-to- Digital Converter
Current sensing
low design effort
low area
spellingShingle Fully-synthesizable
standard cell-based
Analog-to- Digital Converter
Current sensing
low design effort
low area
ORAZIO AIELLO
Paolo Crovetti
AYUSHPARTH SHARMA
ALIOTO,MASSIMO BRUNO
Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort
description 10.1109/ICECS46596.2019.8964789
author2 ELECTRICAL AND COMPUTER ENGINEERING
author_facet ELECTRICAL AND COMPUTER ENGINEERING
ORAZIO AIELLO
Paolo Crovetti
AYUSHPARTH SHARMA
ALIOTO,MASSIMO BRUNO
format Article
author ORAZIO AIELLO
Paolo Crovetti
AYUSHPARTH SHARMA
ALIOTO,MASSIMO BRUNO
author_sort ORAZIO AIELLO
title Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort
title_short Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort
title_full Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort
title_fullStr Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort
title_full_unstemmed Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort
title_sort fully-synthesizable current-input adcs for ultra-low area and minimal design effort
publisher IEEE
publishDate 2021
url https://scholarbank.nus.edu.sg/handle/10635/189170
_version_ 1800914790192775168

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