Formalizing and verifying software architectures
Master's
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2012
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sg-nus-scholar.10635-355342015-01-10T20:30:04Z Formalizing and verifying software architectures ZHANG JIEXIN COMPUTER SCIENCE DONG JIN SONG Software Architecture, Model Checking, Formal Verification, Software Architecture Description Language, Architecture Style, PAT Master's MASTER OF SCIENCE 2012-11-30T18:01:07Z 2012-11-30T18:01:07Z 2012-08-17 Thesis ZHANG JIEXIN (2012-08-17). Formalizing and verifying software architectures. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/35534 NOT_IN_WOS en |
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National University of Singapore |
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Singapore |
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ScholarBank@NUS |
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English |
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Software Architecture, Model Checking, Formal Verification, Software Architecture Description Language, Architecture Style, PAT |
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Software Architecture, Model Checking, Formal Verification, Software Architecture Description Language, Architecture Style, PAT ZHANG JIEXIN Formalizing and verifying software architectures |
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Master's |
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COMPUTER SCIENCE |
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COMPUTER SCIENCE ZHANG JIEXIN |
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Theses and Dissertations |
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ZHANG JIEXIN |
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ZHANG JIEXIN |
title |
Formalizing and verifying software architectures |
title_short |
Formalizing and verifying software architectures |
title_full |
Formalizing and verifying software architectures |
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Formalizing and verifying software architectures |
title_full_unstemmed |
Formalizing and verifying software architectures |
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formalizing and verifying software architectures |
publishDate |
2012 |
url |
http://scholarbank.nus.edu.sg/handle/10635/35534 |
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1681081608344436736 |