Computer-aided dispatch system family architecture and verification: An integrated formal approach
10.1049/ip-sen:20050014
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sg-nus-scholar.10635-389412023-10-30T07:04:23Z Computer-aided dispatch system family architecture and verification: An integrated formal approach Sun, J. Dong, J.S. Jarzabek, S. Wang, H. COMPUTER SCIENCE 10.1049/ip-sen:20050014 IEE Proceedings: Software 153 3 102-112 IPSEF 2013-07-04T07:30:22Z 2013-07-04T07:30:22Z 2006 Article Sun, J., Dong, J.S., Jarzabek, S., Wang, H. (2006). Computer-aided dispatch system family architecture and verification: An integrated formal approach. IEE Proceedings: Software 153 (3) : 102-112. ScholarBank@NUS Repository. https://doi.org/10.1049/ip-sen:20050014 14625970 http://scholarbank.nus.edu.sg/handle/10635/38941 000239099300002 Scopus |
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10.1049/ip-sen:20050014 |
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COMPUTER SCIENCE |
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COMPUTER SCIENCE Sun, J. Dong, J.S. Jarzabek, S. Wang, H. |
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Sun, J. Dong, J.S. Jarzabek, S. Wang, H. |
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Sun, J. Dong, J.S. Jarzabek, S. Wang, H. Computer-aided dispatch system family architecture and verification: An integrated formal approach |
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Sun, J. |
title |
Computer-aided dispatch system family architecture and verification: An integrated formal approach |
title_short |
Computer-aided dispatch system family architecture and verification: An integrated formal approach |
title_full |
Computer-aided dispatch system family architecture and verification: An integrated formal approach |
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Computer-aided dispatch system family architecture and verification: An integrated formal approach |
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Computer-aided dispatch system family architecture and verification: An integrated formal approach |
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computer-aided dispatch system family architecture and verification: an integrated formal approach |
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2013 |
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http://scholarbank.nus.edu.sg/handle/10635/38941 |
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