Mapping statecharts to verilog for hardware/software co-specification

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

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Main Authors: Qin, S., Chin, W.-N.
Other Authors: COMPUTER SCIENCE
Format: Article
Published: 2013
Subjects:
Online Access:http://scholarbank.nus.edu.sg/handle/10635/39818
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-398182024-11-12T18:27:56Z Mapping statecharts to verilog for hardware/software co-specification Qin, S. Chin, W.-N. COMPUTER SCIENCE Homomorphism Operational semantics Statecharts Verilog Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2805 282-300 2013-07-04T07:50:17Z 2013-07-04T07:50:17Z 2003 Article Qin, S.,Chin, W.-N. (2003). Mapping statecharts to verilog for hardware/software co-specification. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2805 : 282-300. ScholarBank@NUS Repository. 03029743 http://scholarbank.nus.edu.sg/handle/10635/39818 NOT_IN_WOS Scopus
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
topic Homomorphism
Operational semantics
Statecharts
Verilog
spellingShingle Homomorphism
Operational semantics
Statecharts
Verilog
Qin, S.
Chin, W.-N.
Mapping statecharts to verilog for hardware/software co-specification
description Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
author2 COMPUTER SCIENCE
author_facet COMPUTER SCIENCE
Qin, S.
Chin, W.-N.
format Article
author Qin, S.
Chin, W.-N.
author_sort Qin, S.
title Mapping statecharts to verilog for hardware/software co-specification
title_short Mapping statecharts to verilog for hardware/software co-specification
title_full Mapping statecharts to verilog for hardware/software co-specification
title_fullStr Mapping statecharts to verilog for hardware/software co-specification
title_full_unstemmed Mapping statecharts to verilog for hardware/software co-specification
title_sort mapping statecharts to verilog for hardware/software co-specification
publishDate 2013
url http://scholarbank.nus.edu.sg/handle/10635/39818
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