DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs

CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis

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Bibliographic Details
Main Authors:	Maxiaguine, A., Chakraborty, S., Thiele, L.
Other Authors:	COMPUTER SCIENCE
Format:	Conference or Workshop Item
Published:	2013
Subjects:	Buffer management DVS Predictable design QoS
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/40645
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-40645
record_format	dspace
spelling	sg-nus-scholar.10635-406452015-02-16T20:12:58Z DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs Maxiaguine, A. Chakraborty, S. Thiele, L. COMPUTER SCIENCE Buffer management DVS Predictable design QoS CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis 111-116 2013-07-04T08:09:05Z 2013-07-04T08:09:05Z 2005 Conference Paper Maxiaguine, A.,Chakraborty, S.,Thiele, L. (2005). DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs. CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis : 111-116. ScholarBank@NUS Repository. 1595931619 http://scholarbank.nus.edu.sg/handle/10635/40645 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
topic	Buffer management DVS Predictable design QoS
spellingShingle	Buffer management DVS Predictable design QoS Maxiaguine, A. Chakraborty, S. Thiele, L. DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
description	CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis
author2	COMPUTER SCIENCE
author_facet	COMPUTER SCIENCE Maxiaguine, A. Chakraborty, S. Thiele, L.
format	Conference or Workshop Item
author	Maxiaguine, A. Chakraborty, S. Thiele, L.
author_sort	Maxiaguine, A.
title	DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
title_short	DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
title_full	DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
title_fullStr	DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
title_full_unstemmed	DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
title_sort	dvs for buffer-constrained architectures with predictable qos-energy tradeoffs
publishDate	2013
url	http://scholarbank.nus.edu.sg/handle/10635/40645
_version_	1681082303597510656

DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs

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