HW/SW co-design for low power arithmetic and logic units

10.1142/S0218194005002014

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Bibliographic Details
Main Authors:	Tiow, T.T., Sin, N.K., Yan, P.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Article
Published:	2014
Subjects:	Arithmetic Logic Unit design Instruction interdependence Instruction scheduling
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/56225
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-56225
record_format	dspace
spelling	sg-nus-scholar.10635-562252015-01-07T06:44:01Z HW/SW co-design for low power arithmetic and logic units Tiow, T.T. Sin, N.K. Yan, P. ELECTRICAL & COMPUTER ENGINEERING Arithmetic Logic Unit design Instruction interdependence Instruction scheduling 10.1142/S0218194005002014 International Journal of Software Engineering and Knowledge Engineering 15 2 335-341 ISEKE 2014-06-17T02:52:09Z 2014-06-17T02:52:09Z 2005-04 Article Tiow, T.T.,Sin, N.K.,Yan, P. (2005-04). HW/SW co-design for low power arithmetic and logic units. International Journal of Software Engineering and Knowledge Engineering 15 (2) : 335-341. ScholarBank@NUS Repository. <a href="https://doi.org/10.1142/S0218194005002014" target="_blank">https://doi.org/10.1142/S0218194005002014</a> 02181940 http://scholarbank.nus.edu.sg/handle/10635/56225 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
topic	Arithmetic Logic Unit design Instruction interdependence Instruction scheduling
spellingShingle	Arithmetic Logic Unit design Instruction interdependence Instruction scheduling Tiow, T.T. Sin, N.K. Yan, P. HW/SW co-design for low power arithmetic and logic units
description	10.1142/S0218194005002014
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Tiow, T.T. Sin, N.K. Yan, P.
format	Article
author	Tiow, T.T. Sin, N.K. Yan, P.
author_sort	Tiow, T.T.
title	HW/SW co-design for low power arithmetic and logic units
title_short	HW/SW co-design for low power arithmetic and logic units
title_full	HW/SW co-design for low power arithmetic and logic units
title_fullStr	HW/SW co-design for low power arithmetic and logic units
title_full_unstemmed	HW/SW co-design for low power arithmetic and logic units
title_sort	hw/sw co-design for low power arithmetic and logic units
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/56225
_version_	1681084642674868224

HW/SW co-design for low power arithmetic and logic units

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