Requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads

10.1109/TPDS.2011.31

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Bibliographic Details
Main Authors:	Hu, M., Veeravalli, B.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Article
Published:	2014
Subjects:	communication delay Divisible loads multiple applications parallel processing processing time release times
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/57252
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-57252
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spelling	sg-nus-scholar.10635-572522023-10-30T21:49:48Z Requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads Hu, M. Veeravalli, B. ELECTRICAL & COMPUTER ENGINEERING communication delay Divisible loads multiple applications parallel processing processing time release times 10.1109/TPDS.2011.31 IEEE Transactions on Parallel and Distributed Systems 22 10 1697-1704 ITDSE 2014-06-17T03:04:03Z 2014-06-17T03:04:03Z 2011 Article Hu, M., Veeravalli, B. (2011). Requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads. IEEE Transactions on Parallel and Distributed Systems 22 (10) : 1697-1704. ScholarBank@NUS Repository. https://doi.org/10.1109/TPDS.2011.31 10459219 http://scholarbank.nus.edu.sg/handle/10635/57252 000294162500009 Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
topic	communication delay Divisible loads multiple applications parallel processing processing time release times
spellingShingle	communication delay Divisible loads multiple applications parallel processing processing time release times Hu, M. Veeravalli, B. Requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads
description	10.1109/TPDS.2011.31
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Hu, M. Veeravalli, B.
format	Article
author	Hu, M. Veeravalli, B.
author_sort	Hu, M.
title	Requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads
title_short	Requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads
title_full	Requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads
title_fullStr	Requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads
title_full_unstemmed	Requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads
title_sort	requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/57252
_version_	1781781373098393600

Requirement-aware strategies with arbitrary processor release times for scheduling multiple divisible loads

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