VLSI circuits for decomposing binary integers into signed power-of-two terms

Proceedings - IEEE International Symposium on Circuits and Systems

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Bibliographic Details
Main Authors:	Yong, Ching Lim, Liu, Bede, Evans, Joseph B.
Other Authors:	ELECTRICAL ENGINEERING
Format:	Conference or Workshop Item
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/81807
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-81807
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spelling	sg-nus-scholar.10635-818072015-01-06T20:58:32Z VLSI circuits for decomposing binary integers into signed power-of-two terms Yong, Ching Lim Liu, Bede Evans, Joseph B. ELECTRICAL ENGINEERING Proceedings - IEEE International Symposium on Circuits and Systems 3 2304-2307 PICSD 2014-10-07T03:12:15Z 2014-10-07T03:12:15Z 1990 Conference Paper Yong, Ching Lim,Liu, Bede,Evans, Joseph B. (1990). VLSI circuits for decomposing binary integers into signed power-of-two terms. Proceedings - IEEE International Symposium on Circuits and Systems 3 : 2304-2307. ScholarBank@NUS Repository. 02714310 http://scholarbank.nus.edu.sg/handle/10635/81807 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
description	Proceedings - IEEE International Symposium on Circuits and Systems
author2	ELECTRICAL ENGINEERING
author_facet	ELECTRICAL ENGINEERING Yong, Ching Lim Liu, Bede Evans, Joseph B.
format	Conference or Workshop Item
author	Yong, Ching Lim Liu, Bede Evans, Joseph B.
spellingShingle	Yong, Ching Lim Liu, Bede Evans, Joseph B. VLSI circuits for decomposing binary integers into signed power-of-two terms
author_sort	Yong, Ching Lim
title	VLSI circuits for decomposing binary integers into signed power-of-two terms
title_short	VLSI circuits for decomposing binary integers into signed power-of-two terms
title_full	VLSI circuits for decomposing binary integers into signed power-of-two terms
title_fullStr	VLSI circuits for decomposing binary integers into signed power-of-two terms
title_full_unstemmed	VLSI circuits for decomposing binary integers into signed power-of-two terms
title_sort	vlsi circuits for decomposing binary integers into signed power-of-two terms
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/81807
_version_	1681089138357436416

VLSI circuits for decomposing binary integers into signed power-of-two terms

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