Chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down CMOS technology
10.1109/LED.2011.2114634
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sg-nus-scholar.10635-820542023-10-26T22:06:49Z Chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down CMOS technology Li, Y. Buddharaju, K. Singh, N. Lo, G.Q. Lee, S.J. ELECTRICAL & COMPUTER ENGINEERING Energy harvesting power silicon nanowire thermoelectric 10.1109/LED.2011.2114634 IEEE Electron Device Letters 32 5 674-676 EDLED 2014-10-07T04:24:51Z 2014-10-07T04:24:51Z 2011-05 Article Li, Y., Buddharaju, K., Singh, N., Lo, G.Q., Lee, S.J. (2011-05). Chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down CMOS technology. IEEE Electron Device Letters 32 (5) : 674-676. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2011.2114634 07413106 http://scholarbank.nus.edu.sg/handle/10635/82054 000289908500032 Scopus |
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National University of Singapore |
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NUS Library |
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Asia |
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Singapore Singapore |
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NUS Library |
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| topic |
Energy harvesting power silicon nanowire thermoelectric |
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Energy harvesting power silicon nanowire thermoelectric Li, Y. Buddharaju, K. Singh, N. Lo, G.Q. Lee, S.J. Chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down CMOS technology |
| description |
10.1109/LED.2011.2114634 |
| author2 |
ELECTRICAL & COMPUTER ENGINEERING |
| author_facet |
ELECTRICAL & COMPUTER ENGINEERING Li, Y. Buddharaju, K. Singh, N. Lo, G.Q. Lee, S.J. |
| format |
Article |
| author |
Li, Y. Buddharaju, K. Singh, N. Lo, G.Q. Lee, S.J. |
| author_sort |
Li, Y. |
| title |
Chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down CMOS technology |
| title_short |
Chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down CMOS technology |
| title_full |
Chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down CMOS technology |
| title_fullStr |
Chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down CMOS technology |
| title_full_unstemmed |
Chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down CMOS technology |
| title_sort |
chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down cmos technology |
| publishDate |
2014 |
| url |
http://scholarbank.nus.edu.sg/handle/10635/82054 |
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1781784050456854528 |