Using monterey phoenix to formalize and verify system architectures
Modeling and analyzing software architectures are useful for helping to understand the system structures and facilitate proper implementation of user requirements. Despite its importance in the software engineering practice, the lack of formal description and verification support hinders the develop...
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| Main Authors: | , , , , |
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| Format: | text |
| Language: | English |
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Institutional Knowledge at Singapore Management University
2012
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| Subjects: | |
| Online Access: | https://ink.library.smu.edu.sg/sis_research/5014 https://ink.library.smu.edu.sg/context/sis_research/article/6017/viewcontent/APSEC_2012.pdf |
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| Institution: | Singapore Management University |
| Language: | English |
| Summary: | Modeling and analyzing software architectures are useful for helping to understand the system structures and facilitate proper implementation of user requirements. Despite its importance in the software engineering practice, the lack of formal description and verification support hinders the development of quality architectural models. In this work, we develop an approach for modeling and verifying software architectures specified using Monterey Phoenix (MP) architecture description language. Firstly, we formalize the syntax and operational semantics for MP. This language is capable of modeling system and environment behaviors based on event traces, as well as supporting different architecture composition operations and views. Secondly, a dedicated model checker for MP is developed based on PAT verification framework. Finally, several case studies are presented to evaluate the usability and effectiveness of our approach. |
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