Enabling an integrated rate-temporal learning scheme on memristor
Learning scheme is the key to the utilization of spike-based computation and the emulation of neural/synaptic behaviors toward realization of cognition. The biological observations reveal an integrated spike time- and spike rate-dependent plasticity as a function of presynaptic firing frequency. How...
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| Main Authors: | , , , , , , , , , |
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| Format: | text |
| Language: | English |
| Published: |
Institutional Knowledge at Singapore Management University
2013
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| Subjects: | |
| Online Access: | https://ink.library.smu.edu.sg/sis_research/7266 https://ink.library.smu.edu.sg/context/sis_research/article/8269/viewcontent/srep04755.pdf |
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| Institution: | Singapore Management University |
| Language: | English |
| Summary: | Learning scheme is the key to the utilization of spike-based computation and the emulation of neural/synaptic behaviors toward realization of cognition. The biological observations reveal an integrated spike time- and spike rate-dependent plasticity as a function of presynaptic firing frequency. However, this integrated rate-temporal learning scheme has not been realized on any nano devices. In this paper, such scheme is successfully demonstrated on a memristor. Great robustness against the spiking rate fluctuation is achieved by waveform engineering with the aid of good analog properties exhibited by the iron oxide-based memristor. The spike-time-dependence plasticity (STDP) occurs at moderate presynaptic firing frequencies and spike-rate-dependence plasticity (SRDP) dominates other regions. This demonstration provides a novel approach in neural coding implementation, which facilitates the development of bio-inspired computing systems. |
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