A compact design of a low frequency quadrature DDFS with low distortion using analog shapers
An analysis and design of a CMOS differential pair and a common source amplifier for shaping a triangular signal into 0-π/4 segments of sine and cosine waveforms are presented. By multiplexing these two shaped outputs, low distortion full sine and cosine signals can be produced at one fourth the fre...
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| Main Authors: | , |
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| 格式: | Article |
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Maruzen Co., Ltd/Maruzen Kabushikikaisha
2015
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| 在線閱讀: | http://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=80052326607&origin=inward http://cmuir.cmu.ac.th/handle/6653943832/38984 |
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| 機構: | Chiang Mai University |
| 總結: | An analysis and design of a CMOS differential pair and a common source amplifier for shaping a triangular signal into 0-π/4 segments of sine and cosine waveforms are presented. By multiplexing these two shaped outputs, low distortion full sine and cosine signals can be produced at one fourth the frequency of the triangular input. These two circuits can be combined with one DAC and a phase accumulator to form a compact quadrature direct digital frequency synthesizer (Q-DDFS) suitable for generating low distortion sinusoidal signals at low frequency. The shapers are biased by two current generators specially designed to compensate for process parameter variations. MOS dimensional mismatch is also studied. The analog part of the Q-DDFS is synthesized using 0.18-micron n-well CMOS technology. A simulation shows that the circuit consumes 1.3mW and can generate 19.96mV 50 kHz sine and cosine signals with spurious free dynamic range (SFDR) of around 50 dBc from a Q-DDFS running at 1.6MHz. Copyright © 2011 The Institute of Electronics, Information and Communication Engineers. |
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