Reduction of switching step/commutation using unipolar CB-SVPWM for three-level NPC inverters

• Main Authors: Hussapong Kitidet, Yuttana Kumsuwan
• 格式: Conference Proceeding
• 出版: 2018
• 主題: Computer Science; Engineering
• 在線閱讀: https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84988891978&origin=inward; http://cmuir.cmu.ac.th/jspui/handle/6653943832/55507
• 機構: Chiang Mai University

© 2016 IEEE. In this paper, the conventional space vector modulation (SVM) and the unipolar carrier-based space vector pulse width modulation (CB-SVPWM) for three-level neutral-point-clamped (NPC) inverters are analyzed based on the continuous scheme. Essentially, the switching commutations of dual methods are obviously investigated and compared for all the operating of conditions along with their corresponding mathematical algorithms. Hereby, the ability of the SVM provide 24, 16, and 12 switching steps per sampling period for region1, region2, and regions 3, 4, respectively, whereas its counterpart can optimize to only 12 steps for overall regions because of its lacking P- and N-type small vectors' usages. That means the unipolar CB-SVPWM can maximally reduce the switching loss from the SVM by 50% for 0<ma ≤0.5 and 25% for 0.5<ma ≤0.866. Simulation results can verify the theoretical validity of the analysis approach with good accordance and agreement.