Approximate 2-Degree-of-freedom digital control of an interleaved low voltage DC-DC buck converter
© 2017 IEEE. In late years, depending on a demand of loads such as FPGA etc., it has been demanded that the output voltage of the DC-DC buck converter is made to decrease and the output current is made to increase. Therefore, it becomes difficult to suppress the dynamic load regulation small. In thi...
Saved in:
| Main Authors: | , , , , |
|---|---|
| 格式: | Conference Proceeding |
| 出版: |
2018
|
| 主題: | |
| 在線閱讀: | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85039931694&origin=inward http://cmuir.cmu.ac.th/jspui/handle/6653943832/57244 |
| 標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|
| 總結: | © 2017 IEEE. In late years, depending on a demand of loads such as FPGA etc., it has been demanded that the output voltage of the DC-DC buck converter is made to decrease and the output current is made to increase. Therefore, it becomes difficult to suppress the dynamic load regulation small. In this paper, it is shown that dynamic load regulation of an interleaved low voltage (1.0[V]) DC-DC buck converter can be suppressed small (5 % of the output voltage, the slew rate 0.6 A/s by an Approximate 2- Degree-of-Freedom (A2DOF) digital control. The controller is implemented by a MD6602 micro controller and it is shown from experiments that the dynamic load regulation is suppressed small enough. |
|---|