A 0.007 mm² 0.6 V 6 MS/s low-power double rail-to-rail SAR ADC in 65-nm CMOS

by Jo, Yong-Jun, Kim, Ju Eon, Baek, Kwang-Hyun, Kim, Tony Tae-Hyoung
Published 2021

Energy-efficient spread second capacitor capacitive DAC for SAR ADC

by Kim, Ju Eon, Lee, Sung-Min, Yoo, Taegeun, Jo, Yong-Jun, Baek, Kwang-Hyun
Published 2019

Transposable 9T-SRAM computation-in-memory for on-chip learning with probability-based single-slope SAR hybrid ADC for edge devices

by Jo, Yong-Jun, Zhang, Xin, Liu, Jiahao, Zhou, Jun, Zheng, Yuanjin, Kim, Tony Tae-Hyoung
Published 2023