LOW-POWER HARDWARE SECURITY PRIMITIVES IMMERSED IN LOGIC AND MEMORY

by SACHIN TANEJA
Published 2021

Fully-Synthesizable Unified True Random Number Generator and Cryptographic Core

by SACHIN TANEJA, ALIOTO,MASSIMO BRUNO
Published 2021

Fully-Synthesizable All-Digital Unified Dynamic Entropy Generation, Extraction and Utilization in a Cryptographic Core for Constrained Secure Systems

by SACHIN TANEJA, ALIOTO,MASSIMO BRUNO
Published 2020

Deep Sub-pJ/bit Low-Area Energy-Security Scalable SIMON Crypto-Core

by SACHIN TANEJA, ALIOTO,MASSIMO BRUNO
Published 2020

PUF Architecture with Run-Time Adaptation for Resilient and Energy-Efficient Key Generation via Sensor Fusion

by SACHIN TANEJA, ALIOTO,MASSIMO BRUNO
Published 2021

Enabling Ubiquitous Hardware Security via Energy-Efficient Primitives and Systems

by ALIOTO,MASSIMO BRUNO, SACHIN TANEJA
Published 2021

Fully-Synthesizable All-Digital Unified Dynamic Entropy Generation, Extraction and Utilization within the Same Cryptographic Core

by SACHIN TANEJA, ALIOTO,MASSIMO BRUNO
Published 2021

Deep Sub-pJ/bit Low-Area Energy-Security Scalable SIMON Crypto-Core in 40 nm

by ALIOTO,MASSIMO BRUNO, SACHIN TANEJA
Published 2021

Unified In-Memory Dynamic TRNG and Multi-Bit Static PUF Entropy Generation for Ubiquitous Hardware Security

by SACHIN TANEJA, ALIOTO,MASSIMO BRUNO, VIVEKA KONANDUR RAJANNA
Published 2021

ECC-Less Multi-Level SRAM Physically Unclonable Function and 127% PUF-to-Memory Capacity Ratio with No Bitcell Modification in 28nm

by Joydeep Basu, Sachin Taneja, Viveka Konandur Rajanna, Tianqi Wang, Massimo Bruno Alioto
Published 2023