Design of a high speed and power efficient quarter-rate clock and data recovery circuit

by Tan, Yung Sern
Published 2012

Integrated circuits design for neural recording sensor interface

by Xiaodan, Zou, Lei, Liu, Tan, Yung Sern, Je, Minkyu, Yeo, Kiat Seng
Published 2013

Design of a hysteresis frequency lock detector for dual-loops clock and data recovery circuit

by Tan, Yung Sern, Yeo, Kiat Seng, Boon, Chirn Chye, Do, Manh Anh
Published 2013

A dual-loop clock and data recovery circuit with compact quarter-rate CMOS linear phase detector

by Tan, Yung Sern, Yeo, Kiat Seng, Boon, Chirn Chye, Do, Manh Anh
Published 2013

Low power implantable neural recording front-end

by Do, Anh Tuan, Tan, Yung Sern, Lam, Chun Kit, Je, Minkyu, Yeo, Kiat Seng
Published 2013

A 57∼66GHz CMOS voltage-controlled oscillator using tunable differential inductor

by Wang, Haitao, Yeo, Kiat Seng, Do, Anh Tuan, Tan, Yung Sern, Kang, Kai, Lu, Zhenghao
Published 2013

A current-mode stimulator circuit with two-step charge balancing background calibration

by Xiong, Gordon M., Do, Anh Tuan, Tan, Yung Sern, Choong, Cleo Swee Neo, Kong, Zhi Hui, Yeo, Kiat Seng
Published 2013

A 9.87 nW 1 kS/s 8.7 ENOB SAR ADC for implantable epileptic seizure detection microsystems

by Do, Anh Tuan, Lam, Chun Kit, Tan, Yung Sern, Yeo, Kiat Seng, Cheong, Jia Hao, Yao, Lei, Tan, Meng Tong, Je, Minkyu
Published 2013

A 160 nW 25 kS/s 9-bit SAR ADC for neural signal recording applications

by Do, Anh Tuan, Lam, Chun Kit, Tan, Yung Sern, Yeo, Kiat Seng, Cheong, Jia Hao, Zou, Xiaodan, Yao, Lei, Cheng, Kuang Wei, Je, Minkyu
Published 2013