DESIGN, IMPLEMENTATION AND VERIFICATION USB DEVICE 1.1 ON FPGA BOARD
This Final Project focuses on USB Device 1.1 redesign process and USBLib-Win32 based Devais Driver design process that worked on Windows OS. Hence, the design of USB Device 1.1 is included an interface I/O designs, so needs a comprehensive methods testing for all aspect that can be occur, than it ca...
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| Format: | Final Project |
| Language: | Indonesia |
| Online Access: | https://digilib.itb.ac.id/gdl/view/12813 |
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| Institution: | Institut Teknologi Bandung |
| Language: | Indonesia |
| Summary: | This Final Project focuses on USB Device 1.1 redesign process and USBLib-Win32 based Devais Driver design process that worked on Windows OS. Hence, the design of USB Device 1.1 is included an interface I/O designs, so needs a comprehensive methods testing for all aspect that can be occur, than it can be expected that design is compatible with another product. The Verification method includes Functional, In Circuit Verification and System Level Verification. The Prototype is implemented on Altera UP3 Education kit Altera Cyclone EP1C6Q240C8 board. On FPGA, the USB design that can work at max clock rate 127.84 MHz needs 1124 logic elements and 2048 bits memory. From the implementation and verification result using the device driver and the application tester, it can be concluded that the design can do complete enumeration and bulk transfer data with 0.415% error rate. |
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