PERANCANGAN CACHE MEMORY MELALUI PENENTUAN UKURAN BLOK UNTUK MEMINIMALKAN MISS RATE
Speed of processor has improved more rapidly than speed of memory, therefore this is called as processor memory gap. In order to lesson this gap, a memory hierarchy is used by placing a small size of memory which has high speed so called as cache memory. To improve the performance of cache memory ca...
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| 格式: | Theses |
| 語言: | Indonesia |
| 在線閱讀: | https://digilib.itb.ac.id/gdl/view/3123 |
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| 機構: | Institut Teknologi Bandung |
| 語言: | Indonesia |