A new switched capacitor 7L inverter with triple voltage gain and low voltage stress
In this brief, a new switched capacitor based multilevel inverter topology is proposed. The proposed topology generates seven level (7L) output voltage using a single dc voltage source along with two floating capacitors. The output voltage of the proposed topology is three-times higher than the inpu...
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| Main Authors: | , , , , |
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| Format: | Article |
| Published: |
IEEE-Inst Electrical Electronics Engineers Inc
2020
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| Subjects: | |
| Online Access: | http://eprints.um.edu.my/36595/ |
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| Institution: | Universiti Malaya |
| Summary: | In this brief, a new switched capacitor based multilevel inverter topology is proposed. The proposed topology generates seven level (7L) output voltage using a single dc voltage source along with two floating capacitors. The output voltage of the proposed topology is three-times higher than the input voltage (i.e., gain factor of V-in : V-out = 1:3) along with self-voltage balancing of capacitors. The proposed seven level triple voltage gain boost inverter (7L-3GBI) inherently generates a bipolar waveform without backend H-bridge that reduces the total standing voltage of the topology. The practicability of the proposed topology has been demonstrated by having a quantitative and cost comparison with similar topologies. Furthermore, the workability of the proposed 7L topology has been validated through different results taken from a prototype laboratory setup. |
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