Comparison of Speed on 5 Adder Architectures
Adders are some of the most critical data path circuits in CPU to perform data processing. The faster the adder, the better it performs data processing. The project presents a novel of comparison analysis on speed of five Complementary metal–oxide– semiconductor (CMOS) adder architectures. The ai...
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2008
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my.unimap-13542008-10-16T04:24:32Z Comparison of Speed on 5 Adder Architectures Norina Mohd Yusoff Norina Idris (Advisor) Adder architectures Circuits Metal oxide semiconductors, Complementary Carry select adder (CSeA) Quartus II software Speed performance Carry look-ahead adder (CLA) Adders are some of the most critical data path circuits in CPU to perform data processing. The faster the adder, the better it performs data processing. The project presents a novel of comparison analysis on speed of five Complementary metal–oxide– semiconductor (CMOS) adder architectures. The aim of the project is to rank those adders based on the speed performance. The five representative adder architectures used are carry select adder (CSeA), carry look-ahead adder (CLA), ripple carry adder (RCA), carry skip adder (CSkA) and carry save adder (CSvA). The previous work has only reported the speed performance of RCA, CSeA and CLA [2]. The operand length for each adder is 16-bits. The project is simulated and carried out using the Quartus II to present the speed performance of the adder architectures and the implementation Altera UP2 board to verification the design. Based on the comparison of the speed performance, the most high-speed adder is identified. The result shows that the most high-speed adder with the speed of 40MHz on EPF10K70RC240-4 is the carry skip adder architecture, followed by CLA (31.45 MHz), CSeA (24.21 MHz), CSvA (17.73 MHz) and RCA (16.98 MHz). 2008-07-01T07:37:46Z 2008-07-01T07:37:46Z 2007-05 Learning Object http://hdl.handle.net/123456789/1354 en Universiti Malaysia Perlis School of Microelectronic Engineering |
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Adder architectures Circuits Metal oxide semiconductors, Complementary Carry select adder (CSeA) Quartus II software Speed performance Carry look-ahead adder (CLA) |
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Adder architectures Circuits Metal oxide semiconductors, Complementary Carry select adder (CSeA) Quartus II software Speed performance Carry look-ahead adder (CLA) Norina Mohd Yusoff Comparison of Speed on 5 Adder Architectures |
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Adders are some of the most critical data path circuits in CPU to perform data
processing. The faster the adder, the better it performs data processing. The project
presents a novel of comparison analysis on speed of five Complementary metal–oxide–
semiconductor (CMOS) adder architectures. The aim of the project is to rank those
adders based on the speed performance. The five representative adder architectures used
are carry select adder (CSeA), carry look-ahead adder (CLA), ripple carry adder (RCA),
carry skip adder (CSkA) and carry save adder (CSvA). The previous work has only reported the speed performance of RCA, CSeA and CLA [2]. The operand length for each adder is 16-bits. The project is simulated and carried out using the Quartus II to present the speed performance of the adder architectures and the implementation Altera UP2 board to verification the design. Based on the comparison of the speed performance, the most high-speed adder is identified. The result shows that the most high-speed adder with the speed of 40MHz on EPF10K70RC240-4 is the carry skip adder architecture, followed by CLA (31.45 MHz), CSeA (24.21 MHz), CSvA (17.73 MHz) and RCA (16.98 MHz). |
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Norina Idris (Advisor) |
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Norina Idris (Advisor) Norina Mohd Yusoff |
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Learning Object |
author |
Norina Mohd Yusoff |
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Norina Mohd Yusoff |
title |
Comparison of Speed on 5 Adder Architectures |
title_short |
Comparison of Speed on 5 Adder Architectures |
title_full |
Comparison of Speed on 5 Adder Architectures |
title_fullStr |
Comparison of Speed on 5 Adder Architectures |
title_full_unstemmed |
Comparison of Speed on 5 Adder Architectures |
title_sort |
comparison of speed on 5 adder architectures |
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Universiti Malaysia Perlis |
publishDate |
2008 |
url |
http://dspace.unimap.edu.my/xmlui/handle/123456789/1354 |
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