Comparison of Speed on 5 Adder Architectures

• Main Author: Norina Mohd Yusoff
• Other Authors: Norina Idris (Advisor)
• Format: Learning Object
• Language: English
• Published: Universiti Malaysia Perlis 2008
• Subjects: Adder architectures; Circuits; Metal oxide semiconductors, Complementary; Carry select adder (CSeA); Quartus II software; Speed performance; Carry look-ahead adder (CLA)
• Online Access: http://dspace.unimap.edu.my/xmlui/handle/123456789/1354
• Institution: Universiti Malaysia Perlis

Adders are some of the most critical data path circuits in CPU to perform data processing. The faster the adder, the better it performs data processing. The project presents a novel of comparison analysis on speed of five Complementary metal–oxide– semiconductor (CMOS) adder architectures. The ai...