Threshold voltage and leakage current variability on process parameter in a 22nm PMOS Device
This article explains the effect of variation on the process parameters while designing a Nano-scaled planar PMOS device in complementary metal-oxide-semiconductor (CMOS) technology for 22 nm gate length. This procedure aims to meet the best combination of fabrication process parameter on the thresh...
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| Main Authors: | , , , , , , |
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| Other Authors: | |
| Format: | Article |
| Published: |
Universiti Teknikal Malaysia Melaka
2023
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| Institution: | Universiti Tenaga Nasional |