Design and optimization of 22 nm gate length high-k/metal gate NMOS transistor

• Main Authors: Afifah Maheran A.H., Menon P.S., Ahmad I., Shaari S., Elgomati H.A., Salehuddin F.
• Other Authors: 36570222300
• Format: Conference paper
• Published: Institute of Physics Publishing 2023
• Subjects: Metal analysis; Nanotechnology; Signal to noise ratio; Silicides; Taguchi methods; Threshold voltage; Titanium dioxide; Analysis of means; Design and optimization; Experiment design; High-k/metal gates; Noise parameters; Optimum parameters; Process parameters; Tungsten silicide; Analysis of variance (ANOVA)
• Institution: Universiti Tenaga Nasional

In this paper, we invented the optimization experiment design of a 22 nm gate length NMOS device which uses a combination of high-k material and metal as the gate which was numerically developed using an industrial-based simulator. The high-k material is Titanium dioxide (TiO2), while the metal gate...