Process parameters optimization of 14nm p-type MOSFET using 2-D analytical modeling

• Main Authors: Noor Faizah, Z.A., Ahmad, I., Ker, P.J., Siti Munirah, Y., Mohd Firdaus, R., Mah, S.K., Menon, P.S.
• Format: Article
• Language: en_US
• Published: 2017
• Institution: Universiti Tenaga Nasional

Simulations of a computer-generated downscaled device at 14nm gate length of p-type MOSFET is conferred in this paper. The device is scaled down from a 32nm transistor which is from the former research. A combination of insulator-conductor that were used includes a high-k material and a metal gate w...