130 nm low power CMOS analog multiplier

• Main Authors: Abu Naim, Ahmad Safuan, Ruslan, Siti Hawa
• Format: Article
• Language: English
• Published: IOP Publishing 2018
• Subjects: TK5101-6720 Telecommunication. Including telegraphy, telephone, radio, radar, television
• Online Access: http://eprints.uthm.edu.my/2901/1/AJ%202019%20%2864%29.pdf; http://eprints.uthm.edu.my/2901/; https://iopscience.iop.org/article/10.1088/1742-6596/1049/1/012071
• Institution: Universiti Tun Hussein Onn Malaysia

Processing analog signal often involves analog multiplier and the multiplier is part of system on chip (SoC). Designing such system with a low power consumption is crucial nowadays. It is very important to increase the system battery lifetime. The design also must be smaller in size. In order to red...