Characterisation of electroless deposition parameter of copper on silicon wafer for through silicon via application
Through silicon via (TSV) is a structure through entire Si substrate that enables vertical electrical connections between chips. Recently, the electroless deposition of Cu using a chemical bath has received considerable attention as a promising technique for the TSV filling process. Even the advanta...
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my.utm.1019222023-07-25T09:30:43Z http://eprints.utm.my/id/eprint/101922/ Characterisation of electroless deposition parameter of copper on silicon wafer for through silicon via application Mior Shahidin, Shazatul Akmaliah TJ Mechanical engineering and machinery Through silicon via (TSV) is a structure through entire Si substrate that enables vertical electrical connections between chips. Recently, the electroless deposition of Cu using a chemical bath has received considerable attention as a promising technique for the TSV filling process. Even the advantages of electroless deposition process is well known by the researchers, further investigation is still needed in order to fully optimise electroless deposition process in TSV fabrication. The main objective of this research is to develop Cu deposition on Si substrate by means of electroless deposition method with optimum parameters for the TSV application. Variable pressure scanning electron microscope (VPSEM) was used to observe the morphology of Cu coated on Si substrate. Besides that energy dispersive X-ray (EDX) was used to determine chemical composition and image analyser was used to measure coating thickness of Cu coated layer based on micrographs obtained from VPSEM. Deposition rate was analysed using the coating thickness or weight gain analysis. The adhesion between Cu and Si substrates was tested using cross hatch test. The results showed that each step in electroless deposition method including pretreatment process (etching and activation processes) as well as the electroless deposition process itself affects the result of Cu coated layer conditions. It was found that the pre-treated Si substrate via etching for 5 minutes in 50% volume of hydrofluoric acid solution had a stronger adhesion compared to etched samples in 25% volume of hydrofluoric acid solution. For the activation process during pre-treatment, single step provides greater effectiveness due to better adhesion of Cu coating on Si substrate compared to double step process. The electroless deposition process, at pH 11.5, temperature of 70°C and 1:5 CuSO4 to formaldehyde ratio was selected as the fixed parameters because the chemical formulation studied in this research shows that electroless Cu coating process is a possible method for the TSV filling process. Through this research, the Cu thin layer was able to be deposited up to 3.334 µm thick on the TSV. 2019 Thesis NonPeerReviewed application/pdf en http://eprints.utm.my/id/eprint/101922/1/ShazatulAkmaliahMiorShahidinMSKM2019.pdf Mior Shahidin, Shazatul Akmaliah (2019) Characterisation of electroless deposition parameter of copper on silicon wafer for through silicon via application. Masters thesis, Universiti Teknologi Malaysia. http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:148441 |
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TJ Mechanical engineering and machinery Mior Shahidin, Shazatul Akmaliah Characterisation of electroless deposition parameter of copper on silicon wafer for through silicon via application |
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Through silicon via (TSV) is a structure through entire Si substrate that enables vertical electrical connections between chips. Recently, the electroless deposition of Cu using a chemical bath has received considerable attention as a promising technique for the TSV filling process. Even the advantages of electroless deposition process is well known by the researchers, further investigation is still needed in order to fully optimise electroless deposition process in TSV fabrication. The main objective of this research is to develop Cu deposition on Si substrate by means of electroless deposition method with optimum parameters for the TSV application. Variable pressure scanning electron microscope (VPSEM) was used to observe the morphology of Cu coated on Si substrate. Besides that energy dispersive X-ray (EDX) was used to determine chemical composition and image analyser was used to measure coating thickness of Cu coated layer based on micrographs obtained from VPSEM. Deposition rate was analysed using the coating thickness or weight gain analysis. The adhesion between Cu and Si substrates was tested using cross hatch test. The results showed that each step in electroless deposition method including pretreatment process (etching and activation processes) as well as the electroless deposition process itself affects the result of Cu coated layer conditions. It was found that the pre-treated Si substrate via etching for 5 minutes in 50% volume of hydrofluoric acid solution had a stronger adhesion compared to etched samples in 25% volume of hydrofluoric acid solution. For the activation process during pre-treatment, single step provides greater effectiveness due to better adhesion of Cu coating on Si substrate compared to double step process. The electroless deposition process, at pH 11.5, temperature of 70°C and 1:5 CuSO4 to formaldehyde ratio was selected as the fixed parameters because the chemical formulation studied in this research shows that electroless Cu coating process is a possible method for the TSV filling process. Through this research, the Cu thin layer was able to be deposited up to 3.334 µm thick on the TSV. |
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Thesis |
author |
Mior Shahidin, Shazatul Akmaliah |
author_facet |
Mior Shahidin, Shazatul Akmaliah |
author_sort |
Mior Shahidin, Shazatul Akmaliah |
title |
Characterisation of electroless deposition parameter of copper on silicon wafer for through silicon via application |
title_short |
Characterisation of electroless deposition parameter of copper on silicon wafer for through silicon via application |
title_full |
Characterisation of electroless deposition parameter of copper on silicon wafer for through silicon via application |
title_fullStr |
Characterisation of electroless deposition parameter of copper on silicon wafer for through silicon via application |
title_full_unstemmed |
Characterisation of electroless deposition parameter of copper on silicon wafer for through silicon via application |
title_sort |
characterisation of electroless deposition parameter of copper on silicon wafer for through silicon via application |
publishDate |
2019 |
url |
http://eprints.utm.my/id/eprint/101922/1/ShazatulAkmaliahMiorShahidinMSKM2019.pdf http://eprints.utm.my/id/eprint/101922/ http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:148441 |
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