An improved asymmetrical multi-level inverter topology with boosted output voltage and reduced components count

• Main Authors: Arif, M. S., Mustafa, U., Siddique, M. D., Ahmad, S., Iqbal, A., Ashique, R. H., Ayob, S.
• Format: Article
• Language: English
• Published: John Wiley and Sons Inc 2021
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/95332/1/ShahrinAyob2021_AnImprovedAsymmetricalMultiLevel.pdf; http://eprints.utm.my/id/eprint/95332/; http://dx.doi.org/10.1049/pel2.12119
• Institution: Universiti Teknologi Malaysia

This paper presents an improved Multi-level Inverter topology utilizing the concept of boosting-capacitor and two DC sources with reduced switches count for generating 17-level output. The topology employs 10 unidirectional switches including one bidirectional switch. Comparison with other recent to...