The Analysis of Parameter Limitation in Diode-Clamped Resonant Gate Drive Circuit
Switching loss has to be reduced in order to improve converter’s performance and efficiency. In high switching frequency, the effect of the loss is much greater. The duty ratio, dead time and inductor value are the limiting parameters which bring implications on the switching loss and hence total ga...
Saved in:
| Main Authors: | , , |
|---|---|
| 格式: | Citation Index Journal |
| 出版: |
2010
|
| 主題: | |
| 在線閱讀: | http://eprints.utp.edu.my/6717/1/Journal%20%5B07%5D.pdf http://eprints.utp.edu.my/6717/ |
| 標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|
| 總結: | Switching loss has to be reduced in order to improve converter’s performance and efficiency. In high switching frequency, the effect of the loss is much greater. The duty ratio, dead time and inductor value are the limiting parameters which bring implications on the switching loss and hence total gate drive loss. Using PSpice circuit simulator, the optimization of these parameters have been carried out and it is found that the duty ratio, dead time and resonant inductor value are 20 %, 15 ns and 9 nH respectively. The details for choosing these values are presented in this paper. |
|---|