The Analysis of Parameter Limitation in Diode-Clamped Resonant Gate Drive Circuit

• Main Authors: Yahaya, Nor Zaihar, awan, mohammad, Begam , Mumtaj
• Format: Citation Index Journal
• Published: 2010
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utp.edu.my/6717/1/Journal%20%5B07%5D.pdf; http://eprints.utp.edu.my/6717/
• Institution: Universiti Teknologi Petronas

Switching loss has to be reduced in order to improve converter’s performance and efficiency. In high switching frequency, the effect of the loss is much greater. The duty ratio, dead time and inductor value are the limiting parameters which bring implications on the switching loss and hence total gate drive loss. Using PSpice circuit simulator, the optimization of these parameters have been carried out and it is found that the duty ratio, dead time and resonant inductor value are 20 %, 15 ns and 9 nH respectively. The details for choosing these values are presented in this paper.