Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks

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Main Authors: Narinderjit Singh A/L Sawaran Singh, Nor Hisham bin Hamid, Vijanth Sagayan A/L Asirvadam
Format: Citation Index Journal
Published: 2012
Online Access:http://eprints.utp.edu.my/9792/
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Institution: Universiti Teknologi Petronas
id my.utp.eprints.9792
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spelling my.utp.eprints.97922013-04-07T03:46:53Z Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks Narinderjit Singh A/L Sawaran Singh, Nor Hisham bin Hamid, Vijanth Sagayan A/L Asirvadam, 2012 Citation Index Journal NonPeerReviewed Narinderjit Singh A/L Sawaran Singh, and Nor Hisham bin Hamid, and Vijanth Sagayan A/L Asirvadam, (2012) Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks. [Citation Index Journal] http://eprints.utp.edu.my/9792/
institution Universiti Teknologi Petronas
building UTP Resource Centre
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Petronas
content_source UTP Institutional Repository
url_provider http://eprints.utp.edu.my/
format Citation Index Journal
author Narinderjit Singh A/L Sawaran Singh,
Nor Hisham bin Hamid,
Vijanth Sagayan A/L Asirvadam,
spellingShingle Narinderjit Singh A/L Sawaran Singh,
Nor Hisham bin Hamid,
Vijanth Sagayan A/L Asirvadam,
Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
author_facet Narinderjit Singh A/L Sawaran Singh,
Nor Hisham bin Hamid,
Vijanth Sagayan A/L Asirvadam,
author_sort Narinderjit Singh A/L Sawaran Singh,
title Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
title_short Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
title_full Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
title_fullStr Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
title_full_unstemmed Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
title_sort determination of worst case input combinations of nanoscale circuits using bayesian networks
publishDate 2012
url http://eprints.utp.edu.my/9792/
_version_ 1738655790767538176