Experimental modules on integrated circuit design using tanner for 0.25 um, 0.35 um, and 0.5 CMOS process

Experimental modules on integrated circuit design using tanner for 0.25 um, 0.35 um, and 0.5 CMOS process

The purpose of this study was to make an Experimental Modules on Integrated Circuit Design Using Tanner for 0.35 um, and 0.5 um CMOS Process. The study includes the development of the environment library for the 0.25 um, 0.35 um, and 0.5 um CMOS processes and the construction, layout designing, DRC,...

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Main Authors: Escano, Ron Alvin V., Katigbak, Bour'bon S., Kumar, Nivas P., Santiago, Jan Romark G.
Format: text
Language:English
Published: Animo Repository 2010
Subjects:
Integrated circuits > Design and construction
Digital integrated circuits > Design and construction
Psychology
Online Access:https://animorepository.dlsu.edu.ph/etd_bachelors/10455
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Institution: De La Salle University
Language: English
id oai:animorepository.dlsu.edu.ph:etd_bachelors-11100
record_format eprints
spelling oai:animorepository.dlsu.edu.ph:etd_bachelors-111002021-11-24T04:14:59Z Experimental modules on integrated circuit design using tanner for 0.25 um, 0.35 um, and 0.5 CMOS process Escano, Ron Alvin V. Katigbak, Bour'bon S. Kumar, Nivas P. Santiago, Jan Romark G. The purpose of this study was to make an Experimental Modules on Integrated Circuit Design Using Tanner for 0.35 um, and 0.5 um CMOS Process. The study includes the development of the environment library for the 0.25 um, 0.35 um, and 0.5 um CMOS processes and the construction, layout designing, DRC, LVS, Parasitic Extraction, and simulation of the circuits. The study also focuses the development of tutorial manuals for using the different designing tools of Tanner EDA, namely, L-Edit and S-Edit, in 0.25 um, 0.35 um CMOS Processes designing environment. 2010-01-01T08:00:00Z text https://animorepository.dlsu.edu.ph/etd_bachelors/10455 Bachelor's Theses English Animo Repository Integrated circuits--Design and construction Digital integrated circuits--Design and construction Psychology
institution De La Salle University
building De La Salle University Library
continent Asia
country Philippines
Philippines
content_provider De La Salle University Library
collection DLSU Institutional Repository
language English
topic Integrated circuits--Design and construction
Digital integrated circuits--Design and construction
Psychology
spellingShingle Integrated circuits--Design and construction
Digital integrated circuits--Design and construction
Psychology
Escano, Ron Alvin V.
Katigbak, Bour'bon S.
Kumar, Nivas P.
Santiago, Jan Romark G.
Experimental modules on integrated circuit design using tanner for 0.25 um, 0.35 um, and 0.5 CMOS process
description The purpose of this study was to make an Experimental Modules on Integrated Circuit Design Using Tanner for 0.35 um, and 0.5 um CMOS Process. The study includes the development of the environment library for the 0.25 um, 0.35 um, and 0.5 um CMOS processes and the construction, layout designing, DRC, LVS, Parasitic Extraction, and simulation of the circuits. The study also focuses the development of tutorial manuals for using the different designing tools of Tanner EDA, namely, L-Edit and S-Edit, in 0.25 um, 0.35 um CMOS Processes designing environment.
format text
author Escano, Ron Alvin V.
Katigbak, Bour'bon S.
Kumar, Nivas P.
Santiago, Jan Romark G.
author_facet Escano, Ron Alvin V.
Katigbak, Bour'bon S.
Kumar, Nivas P.
Santiago, Jan Romark G.
author_sort Escano, Ron Alvin V.
title Experimental modules on integrated circuit design using tanner for 0.25 um, 0.35 um, and 0.5 CMOS process
title_short Experimental modules on integrated circuit design using tanner for 0.25 um, 0.35 um, and 0.5 CMOS process
title_full Experimental modules on integrated circuit design using tanner for 0.25 um, 0.35 um, and 0.5 CMOS process
title_fullStr Experimental modules on integrated circuit design using tanner for 0.25 um, 0.35 um, and 0.5 CMOS process
title_full_unstemmed Experimental modules on integrated circuit design using tanner for 0.25 um, 0.35 um, and 0.5 CMOS process
title_sort experimental modules on integrated circuit design using tanner for 0.25 um, 0.35 um, and 0.5 cmos process
publisher Animo Repository
publishDate 2010
url https://animorepository.dlsu.edu.ph/etd_bachelors/10455
_version_ 1772834714214727680

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