Design of CMOS based incremental sigma-delta analog-to-digital converter
This paper reviews the theoretical operation and describes the design of a 3.3V CMOS Based Incremental Sigma-Delta Analog-to-Digital Converter using 35um CMOS technology. Incremental sigma-delta analog-to-digital converter is a combination of the Nyquist-Rate Dual Slope Converter and Sigma-Delta Con...
Saved in:
Main Authors: | Gorospe, Rey Andrew P., Javier, Jerome Jimm R., Nicolas, April Caezelle M. |
---|---|
Format: | text |
Language: | English |
Published: |
Animo Repository
2010
|
Subjects: | |
Online Access: | https://animorepository.dlsu.edu.ph/etd_bachelors/10687 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | De La Salle University |
Language: | English |
Similar Items
-
DESIGN OF LOW-POWER LOW-VOLTAGE SUCCESSIVE-APPROXIMATION ANALOG-TO-DIGITAL CONVERTERS
by: LI YONG FU
Published: (2015) -
Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters
by: Chacón, Oscar Morales, et al.
Published: (2022) -
Design of a low voltage bipolar delta-sigma ADC with CIC decimation filter
by: Abad, Alexander C., et al.
Published: (2011) -
A 0.35um low voltage ADC using Delta-Sigma modulator with CIC decimation filter
by: Abad, Alexander C.
Published: (2011) -
A 16-bit single-OTA second-order discrete time delta-sigma modulator with improved noise-coupling technique
by: Zhang, Siqi
Published: (2024)