A Full-custom based design of an 8-bit DLX computer architecture

Microprocessor or Central Processing Unit (CPU) serves as the brain and heart of the computer. It is based on different kinds of architecture, one of which is the DLX Computer Architecture. DLX, which is designed by John L. Hennessy and David A. Patterson, embodies the principles of Reduced Instruct...

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Main Authors: Castillo, Gerald Menel B., De Jesus, Jason Angelo B., Luna, Justine Riza A., Urbino, Wendell C.
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Language:English
Published: Animo Repository 2010
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Online Access:https://animorepository.dlsu.edu.ph/etd_bachelors/14680
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Institution: De La Salle University
Language: English
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spelling oai:animorepository.dlsu.edu.ph:etd_bachelors-153222021-11-15T05:12:16Z A Full-custom based design of an 8-bit DLX computer architecture Castillo, Gerald Menel B. De Jesus, Jason Angelo B. Luna, Justine Riza A. Urbino, Wendell C. Microprocessor or Central Processing Unit (CPU) serves as the brain and heart of the computer. It is based on different kinds of architecture, one of which is the DLX Computer Architecture. DLX, which is designed by John L. Hennessy and David A. Patterson, embodies the principles of Reduced Instruction Set Computer (RISC). It is simple load/store architecture and has efficient pipelining design. Making use of this architecture and the 0.35-micron technology, this thesis aimed to design (full-custom) and implement the data path of CMOS based 8-bit microcontroller core architecture. CMOS conserves power by allowing the processor to be in the sleep state since it does not consume power when it is in idle state. The molecules of the architecture include Instruction Memory, Register Banks, Arithmetic Logic Unit, and Data Memory. From the research and design of schematic diagrams for each individual module, the netlists were encoded and simulated through T-Spice. The layout was then constructed and extracted through Layout-editor (L-edit) and the extracted spice netlists with parasitic capacitances were again simulated to verify the performance of the microprocessor. The designed modules were then characterized in terms of functionality, speed and general power consumption. 2010-01-01T08:00:00Z text https://animorepository.dlsu.edu.ph/etd_bachelors/14680 Bachelor's Theses English Animo Repository Microprocessors Computer architecture Computer software
institution De La Salle University
building De La Salle University Library
continent Asia
country Philippines
Philippines
content_provider De La Salle University Library
collection DLSU Institutional Repository
language English
topic Microprocessors
Computer architecture
Computer software
spellingShingle Microprocessors
Computer architecture
Computer software
Castillo, Gerald Menel B.
De Jesus, Jason Angelo B.
Luna, Justine Riza A.
Urbino, Wendell C.
A Full-custom based design of an 8-bit DLX computer architecture
description Microprocessor or Central Processing Unit (CPU) serves as the brain and heart of the computer. It is based on different kinds of architecture, one of which is the DLX Computer Architecture. DLX, which is designed by John L. Hennessy and David A. Patterson, embodies the principles of Reduced Instruction Set Computer (RISC). It is simple load/store architecture and has efficient pipelining design. Making use of this architecture and the 0.35-micron technology, this thesis aimed to design (full-custom) and implement the data path of CMOS based 8-bit microcontroller core architecture. CMOS conserves power by allowing the processor to be in the sleep state since it does not consume power when it is in idle state. The molecules of the architecture include Instruction Memory, Register Banks, Arithmetic Logic Unit, and Data Memory. From the research and design of schematic diagrams for each individual module, the netlists were encoded and simulated through T-Spice. The layout was then constructed and extracted through Layout-editor (L-edit) and the extracted spice netlists with parasitic capacitances were again simulated to verify the performance of the microprocessor. The designed modules were then characterized in terms of functionality, speed and general power consumption.
format text
author Castillo, Gerald Menel B.
De Jesus, Jason Angelo B.
Luna, Justine Riza A.
Urbino, Wendell C.
author_facet Castillo, Gerald Menel B.
De Jesus, Jason Angelo B.
Luna, Justine Riza A.
Urbino, Wendell C.
author_sort Castillo, Gerald Menel B.
title A Full-custom based design of an 8-bit DLX computer architecture
title_short A Full-custom based design of an 8-bit DLX computer architecture
title_full A Full-custom based design of an 8-bit DLX computer architecture
title_fullStr A Full-custom based design of an 8-bit DLX computer architecture
title_full_unstemmed A Full-custom based design of an 8-bit DLX computer architecture
title_sort full-custom based design of an 8-bit dlx computer architecture
publisher Animo Repository
publishDate 2010
url https://animorepository.dlsu.edu.ph/etd_bachelors/14680
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