Link layer and transport layer implementation for a serial ATA drive interface to Xilinx ML410 FPGA development board based on a single physically ready input from the physical layer

• Main Authors: Chua, Keith Benedict T., Kong, Seann Kenny S., Kua Chun Ming, Kelvin T.
• Format: text
• Language: English
• Published: Animo Repository 2012
• Online Access: https://animorepository.dlsu.edu.ph/etd_bachelors/14799
• Institution: De La Salle University

In an attempt to bridge the knowledge gap between the industry and academic community in the field of secondary storage, an implementation of a Serial ATA Host Controller is done on Virtex-4 ML410 after the controller is interfaced to the MicroBlaze softcore processor. The transport and the link lay...