CAI for microprocessor architecture and design of RISC architecture

This project entitled CAI FOR MICROPROCESSOR ARCHITECTURE AND DESIGN OF RISC ARCHITECTURE is a web-based educational tool that aims to enhance the knowledge of the user in microprocessor architecture and the design of the Reduced Instruction Set Computer Architecture. This project was developed usin...

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Main Authors:	De Vera, Rica Eunice T., Tan, Stephanie Joy L.
Format:	text
Language:	English
Published:	Animo Repository 2007
Subjects:	Microprocessors Computer architecture Electrical and Computer Engineering
Online Access:	https://animorepository.dlsu.edu.ph/etd_bachelors/5019
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Institution:	De La Salle University
Language:	English

id	oai:animorepository.dlsu.edu.ph:etd_bachelors-5494
record_format	eprints
spelling	oai:animorepository.dlsu.edu.ph:etd_bachelors-54942021-03-18T01:33:23Z CAI for microprocessor architecture and design of RISC architecture De Vera, Rica Eunice T. Tan, Stephanie Joy L. This project entitled CAI FOR MICROPROCESSOR ARCHITECTURE AND DESIGN OF RISC ARCHITECTURE is a web-based educational tool that aims to enhance the knowledge of the user in microprocessor architecture and the design of the Reduced Instruction Set Computer Architecture. This project was developed using PHP as the middleware and MySQL for the database. Macromedia Flash was used in creating the lecture pages to be able to incorporate relevant interactions, simulations and animations in the discussion. These means are effective in imparting knowledge to the user and were also proven by the results undertaken. 2007-01-01T08:00:00Z text https://animorepository.dlsu.edu.ph/etd_bachelors/5019 Bachelor's Theses English Animo Repository Microprocessors Computer architecture Electrical and Computer Engineering
institution	De La Salle University
building	De La Salle University Library
continent	Asia
country	Philippines Philippines
content_provider	De La Salle University Library
collection	DLSU Institutional Repository
language	English
topic	Microprocessors Computer architecture Electrical and Computer Engineering
spellingShingle	Microprocessors Computer architecture Electrical and Computer Engineering De Vera, Rica Eunice T. Tan, Stephanie Joy L. CAI for microprocessor architecture and design of RISC architecture
description	This project entitled CAI FOR MICROPROCESSOR ARCHITECTURE AND DESIGN OF RISC ARCHITECTURE is a web-based educational tool that aims to enhance the knowledge of the user in microprocessor architecture and the design of the Reduced Instruction Set Computer Architecture. This project was developed using PHP as the middleware and MySQL for the database. Macromedia Flash was used in creating the lecture pages to be able to incorporate relevant interactions, simulations and animations in the discussion. These means are effective in imparting knowledge to the user and were also proven by the results undertaken.
format	text
author	De Vera, Rica Eunice T. Tan, Stephanie Joy L.
author_facet	De Vera, Rica Eunice T. Tan, Stephanie Joy L.
author_sort	De Vera, Rica Eunice T.
title	CAI for microprocessor architecture and design of RISC architecture
title_short	CAI for microprocessor architecture and design of RISC architecture
title_full	CAI for microprocessor architecture and design of RISC architecture
title_fullStr	CAI for microprocessor architecture and design of RISC architecture
title_full_unstemmed	CAI for microprocessor architecture and design of RISC architecture
title_sort	cai for microprocessor architecture and design of risc architecture
publisher	Animo Repository
publishDate	2007
url	https://animorepository.dlsu.edu.ph/etd_bachelors/5019
_version_	1772834594204155904

CAI for microprocessor architecture and design of RISC architecture

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