Branch optimization to improve branch prediction for P6 superpipeline microarchitecture

• 主要作者: Uy, Roger Luis
• 格式: text
• 語言: English
• 出版: Animo Repository 1999
• 主題: Computer architecture; Mathematical optimization; Programming (Electronic Computers); Systems Architecture
• 在線閱讀: https://animorepository.dlsu.edu.ph/etd_masteral/2291
• 機構: De La Salle University

In superpipeline microarchitecture, the instruction execution cycle is divided into many stages. This type of microarchitecture increases the throughput or the number of instructions executed in a certain time period. But, pipeline stalls due to branch misprediction causes severe degradation in the performance. Microarchitecture employs hardware-based branch prediction to predict the branch target. But it is not enough. Software-based or program-level branch prediction is also needed to complement the hardware-based branch prediction. In this paper, rules for branch optimization at program level are introduced to complement the hardware-level branch prediction of P6 microarchitecture.