An FPGA implementation of systolic array for Montgomery multiplication

• Main Authors: Nazar, Medi A., Kittitornkun, Surin, Bunyatnoparat, Pratheep
• Format: text
• Published: Animo Repository 2005
• Subjects: Public key cryptography; Field programmable gate arrays; Systolic array circuits; Electrical and Computer Engineering
• Online Access: https://animorepository.dlsu.edu.ph/faculty_research/8207
• Institution: De La Salle University

Public-key cryptographic algorithms such as RSA algorithm require modular multiplications of very large operands. In RSA, the higher security the larger operand size which may reduce the clock rate and result to lower throughput This paper presents a fully systolic linear-array for the computation o...