An FPGA implementation of systolic array for Montgomery multiplication

An FPGA implementation of systolic array for Montgomery multiplication

Public-key cryptographic algorithms such as RSA algorithm require modular multiplications of very large operands. In RSA, the higher security the larger operand size which may reduce the clock rate and result to lower throughput This paper presents a fully systolic linear-array for the computation o...

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書目詳細資料
Main Authors:	Nazar, Medi A., Kittitornkun, Surin, Bunyatnoparat, Pratheep
格式:	text
出版:	Animo Repository 2005
主題:	Public key cryptography Field programmable gate arrays Systolic array circuits Electrical and Computer Engineering
在線閱讀:	https://animorepository.dlsu.edu.ph/faculty_research/8207
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