A VHDL implementation of an enhanced reconfigurable arithmetic logic unit implemented in Virtex 4
Reconfigurable computing has been a computing method that further develops the processing speed of the software. It drastically increases the computing speed depending on the implementation and the hardware specifications. It requires manipulation of the hardware configurations in reconfigurable dev...
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格式: | text |
語言: | English |
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Animo Repository
2011
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在線閱讀: | https://animorepository.dlsu.edu.ph/etd_bachelors/11314 |
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機構: | De La Salle University |
語言: | English |