FPGA-based built-in self test for a 4-bit BCD adder
In this paper, an FPGA-based built in self-test program for a 4-bit BCD adder is presented. The program can detect stuck at faults and bridging faults. The main components of the program include: circuit under test, main controller, test pattern generator, scan chain and the output response analyzer...
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Main Authors: | , , , |
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Format: | text |
Language: | English |
Published: |
Animo Repository
2010
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Subjects: | |
Online Access: | https://animorepository.dlsu.edu.ph/etd_bachelors/14693 |
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Institution: | De La Salle University |
Language: | English |