Low power implantable neural recording front-end
Low power smart electronic designs for neural recording applications have recently become a major research topic in circuits and system society. Challenged by the complicated nature of the biology-electronic interface, implantable neural recording circuits must offer high quality signal acquisition...
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Main Authors: | , , , , |
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Other Authors: | |
Format: | Conference or Workshop Item |
Language: | English |
Published: |
2013
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/100230 http://hdl.handle.net/10220/13599 |
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Institution: | Nanyang Technological University |
Language: | English |
Summary: | Low power smart electronic designs for neural recording applications have recently become a major research topic in circuits and system society. Challenged by the complicated nature of the biology-electronic interface, implantable neural recording circuits must offer high quality signal acquisition while consuming as little power as possible. Furthermore, many applications demand on-chip smart features to maximize energy efficiency as well as to assist the subsequent software-based digital signal processing. This paper reviews the recent advancements in the field, followed by a proposed ultra low-power recording front-end. The proposed design consists of an adjustable gain and bandwidth low-noise amplifier, a bandpass filter, a unity gain buffer and a 9-bit ADC. When simulated using a 0.18 μm/1 V CMOS process, the whole channel consumes only 2.76 μW. |
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