High-performance partially aligned semiconductive single-walled carbon nanotube transistors achieved with a parallel technique

Single-walled carbon nanotubes (SWNTs) are widely thought to be a strong contender for next-generation printed electronic transistor materials. However, large-scale solution-based parallel assembly of SWNTs to obtain high-performance transistor devices is challenging. SWNTs have anisotropic properti...

Full description

Saved in:
Bibliographic Details
Main Authors: Wang, Yilei, Pillai, Suresh Kumar Raman, Chan-Park, Mary B.
Other Authors: School of Chemical and Biomedical Engineering
Format: Article
Language:English
Published: 2014
Subjects:
Online Access:https://hdl.handle.net/10356/100966
http://hdl.handle.net/10220/19009
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-100966
record_format dspace
spelling sg-ntu-dr.10356-1009662020-03-07T11:40:21Z High-performance partially aligned semiconductive single-walled carbon nanotube transistors achieved with a parallel technique Wang, Yilei Pillai, Suresh Kumar Raman Chan-Park, Mary B. School of Chemical and Biomedical Engineering DRNTU::Engineering::Chemical engineering Single-walled carbon nanotubes (SWNTs) are widely thought to be a strong contender for next-generation printed electronic transistor materials. However, large-scale solution-based parallel assembly of SWNTs to obtain high-performance transistor devices is challenging. SWNTs have anisotropic properties and, although partial alignment of the nanotubes has been theoretically predicted to achieve optimum transistor device performance, thus far no parallel solution-based technique can achieve this. Herein a novel solution-based technique, the immersion-cum-shake method, is reported to achieve partially aligned SWNT networks using semiconductive (99% enriched) SWNTs (s-SWNTs). By immersing an aminosilane-treated wafer into a solution of nanotubes placed on a rotary shaker, the repetitive flow of the nanotube solution over the wafer surface during the deposition process orients the nanotubes toward the fluid flow direction. By adjusting the nanotube concentration in the solution, the nanotube density of the partially aligned network can be controlled; linear densities ranging from 5 to 45 SWNTs/μm are observed. Through control of the linear SWNT density and channel length, the optimum SWNT-based field-effect transistor devices achieve outstanding performance metrics (with an on/off ratio of ~3.2 × 104 and mobility 46.5 cm2/Vs). Atomic force microscopy shows that the partial alignment is uniform over an area of 20 × 20 mm2 and confirms that the orientation of the nanotubes is mostly along the fluid flow direction, with a narrow orientation scatter characterized by a full width at half maximum (FWHM) of <15° for all but the densest film, which is 35°. This parallel process is large-scale applicable and exploits the anisotropic properties of the SWNTs, presenting a viable path forward for industrial adoption of SWNTs in printed, flexible, and large-area electronics. 2014-03-27T08:36:54Z 2019-12-06T20:31:32Z 2014-03-27T08:36:54Z 2019-12-06T20:31:32Z 2013 2013 Journal Article Wang, Y., Pillai, S. K. R., & Chan-Park, M. B. (2013). High-performance partially aligned semiconductive single-walled carbon nanotube transistors achieved with a parallel technique. Small, 9(17), 2960-2969. 1613-6810 https://hdl.handle.net/10356/100966 http://hdl.handle.net/10220/19009 10.1002/smll.201203178 en Small © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Chemical engineering
spellingShingle DRNTU::Engineering::Chemical engineering
Wang, Yilei
Pillai, Suresh Kumar Raman
Chan-Park, Mary B.
High-performance partially aligned semiconductive single-walled carbon nanotube transistors achieved with a parallel technique
description Single-walled carbon nanotubes (SWNTs) are widely thought to be a strong contender for next-generation printed electronic transistor materials. However, large-scale solution-based parallel assembly of SWNTs to obtain high-performance transistor devices is challenging. SWNTs have anisotropic properties and, although partial alignment of the nanotubes has been theoretically predicted to achieve optimum transistor device performance, thus far no parallel solution-based technique can achieve this. Herein a novel solution-based technique, the immersion-cum-shake method, is reported to achieve partially aligned SWNT networks using semiconductive (99% enriched) SWNTs (s-SWNTs). By immersing an aminosilane-treated wafer into a solution of nanotubes placed on a rotary shaker, the repetitive flow of the nanotube solution over the wafer surface during the deposition process orients the nanotubes toward the fluid flow direction. By adjusting the nanotube concentration in the solution, the nanotube density of the partially aligned network can be controlled; linear densities ranging from 5 to 45 SWNTs/μm are observed. Through control of the linear SWNT density and channel length, the optimum SWNT-based field-effect transistor devices achieve outstanding performance metrics (with an on/off ratio of ~3.2 × 104 and mobility 46.5 cm2/Vs). Atomic force microscopy shows that the partial alignment is uniform over an area of 20 × 20 mm2 and confirms that the orientation of the nanotubes is mostly along the fluid flow direction, with a narrow orientation scatter characterized by a full width at half maximum (FWHM) of <15° for all but the densest film, which is 35°. This parallel process is large-scale applicable and exploits the anisotropic properties of the SWNTs, presenting a viable path forward for industrial adoption of SWNTs in printed, flexible, and large-area electronics.
author2 School of Chemical and Biomedical Engineering
author_facet School of Chemical and Biomedical Engineering
Wang, Yilei
Pillai, Suresh Kumar Raman
Chan-Park, Mary B.
format Article
author Wang, Yilei
Pillai, Suresh Kumar Raman
Chan-Park, Mary B.
author_sort Wang, Yilei
title High-performance partially aligned semiconductive single-walled carbon nanotube transistors achieved with a parallel technique
title_short High-performance partially aligned semiconductive single-walled carbon nanotube transistors achieved with a parallel technique
title_full High-performance partially aligned semiconductive single-walled carbon nanotube transistors achieved with a parallel technique
title_fullStr High-performance partially aligned semiconductive single-walled carbon nanotube transistors achieved with a parallel technique
title_full_unstemmed High-performance partially aligned semiconductive single-walled carbon nanotube transistors achieved with a parallel technique
title_sort high-performance partially aligned semiconductive single-walled carbon nanotube transistors achieved with a parallel technique
publishDate 2014
url https://hdl.handle.net/10356/100966
http://hdl.handle.net/10220/19009
_version_ 1681048218035552256