A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion
This paper presents a new 16-bit analog-to-residue converter (ARC) for a three moduli set {26-1, 26, 26+1} RNS with a dynamic range of 18 bits. Based on dual-slope integrating principle, direct conversion from analog to residue representation is achieved with only three modulo counters after the vol...
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sg-ntu-dr.10356-1014572020-03-07T13:24:50Z A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion Tang, Howard Low, Joshua Yung Lih Low, Jeremy Yung Shern Siek, Liter Jong, Ching Chuen Chang, Chip Hong School of Electrical and Electronic Engineering IEEE Asia Pacific Conference on Circuits and Systems (2012 : Kaohsiung, Taiwan) DRNTU::Engineering::Electrical and electronic engineering This paper presents a new 16-bit analog-to-residue converter (ARC) for a three moduli set {26-1, 26, 26+1} RNS with a dynamic range of 18 bits. Based on dual-slope integrating principle, direct conversion from analog to residue representation is achieved with only three modulo counters after the voltage sensing circuits. By eliminating the costly binary-to-residue converter, the proposed ARC saves 81.6% of area in comparison with the conventional two-stage architecture consisting of an integrating ADC and a RNS forward converter. 2013-10-10T02:41:18Z 2019-12-06T20:38:55Z 2013-10-10T02:41:18Z 2019-12-06T20:38:55Z 2012 2012 Conference Paper Tang, H., Low, J. Y. L., Low, J. Y. S., Siek, L., Jong, C. C., & Chang, C. H. (2012). A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion. 2012 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 272-275. https://hdl.handle.net/10356/101457 http://hdl.handle.net/10220/16335 10.1109/APCCAS.2012.6419024 en |
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DRNTU::Engineering::Electrical and electronic engineering Tang, Howard Low, Joshua Yung Lih Low, Jeremy Yung Shern Siek, Liter Jong, Ching Chuen Chang, Chip Hong A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion |
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This paper presents a new 16-bit analog-to-residue converter (ARC) for a three moduli set {26-1, 26, 26+1} RNS with a dynamic range of 18 bits. Based on dual-slope integrating principle, direct conversion from analog to residue representation is achieved with only three modulo counters after the voltage sensing circuits. By eliminating the costly binary-to-residue converter, the proposed ARC saves 81.6% of area in comparison with the conventional two-stage architecture consisting of an integrating ADC and a RNS forward converter. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Tang, Howard Low, Joshua Yung Lih Low, Jeremy Yung Shern Siek, Liter Jong, Ching Chuen Chang, Chip Hong |
format |
Conference or Workshop Item |
author |
Tang, Howard Low, Joshua Yung Lih Low, Jeremy Yung Shern Siek, Liter Jong, Ching Chuen Chang, Chip Hong |
author_sort |
Tang, Howard |
title |
A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion |
title_short |
A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion |
title_full |
A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion |
title_fullStr |
A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion |
title_full_unstemmed |
A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion |
title_sort |
compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion |
publishDate |
2013 |
url |
https://hdl.handle.net/10356/101457 http://hdl.handle.net/10220/16335 |
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1681041889929723904 |