IC CAD & design automation

by Jong, Ching Chuen
Published 2008

Development of a software program for synthesis of VLSI systems

by Jong, Ching Chuen
Published 2008

Multivoltage multifrequency low-energy synthesis for functionally pipelined datapath

by Xing, Xianwu, Jong, Ching Chuen
Published 2010

A memory-efficient scalable architecture for lifting-based discrete wavelet transform

by Hu, Yusong, Jong, Ching Chuen
Published 2013

A memory-efficient high-throughput architecture for lifting-based multi-level 2-D DWT

by Hu, Yusong, Jong, Ching Chuen
Published 2013

A high-throughput VLSI architecture for real-time full-HD gradient guided image filter

by Wu, Lei, Jong, Ching Chuen
Published 2020

Non-iterative division circuit design with accuracy and performance trade-off based on mixed integer linear programming approach

by Wu, Lei, Jong, Ching Chuen
Published 2022

Scalable linear array architectures for matrix inversion using Bi-z CORDIC

by Luo, J. W., Jong, Ching Chuen
Published 2013

Functional area lower bound and upper bound on multicomponent selection for interval scheduling

by Shen, Zhao Xuan, Jong, Ching Chuen
Published 2010

A memory-efficient tables-and-additions method for accurate computation of elementary functions

by Low, Joshua Yung Lih, Jong, Ching Chuen
Published 2013

Design of low-complexity FIR filters based on signed-powers-of-two coefficients with reusable common subexpressions

by Xu, Fei, Chang, Chip Hong, Jong, Ching Chuen
Published 2009

Contention resolution : a new approach to versatile subexpressions sharing in multiple constant multiplications

by Xu, Fei, Chang, Chip Hong, Jong, Ching Chuen
Published 2010

Contention resolution algorithm for common subexpression elimination in digital filter design

by Xu, Fei, Chang, Chip Hong, Jong, Ching Chuen
Published 2009

Development of an IC for isolated speech recognition using high-level synthesis approach

by Jong, Ching Chuen, Siek, Liter, Ng, Lian Soon
Published 2008

High-speed and low-power serial accumulator for serial/parallel multiplier

by Meher, Manas Ranjan, Jong, Ching Chuen, Chang, Chip Hong
Published 2010

An area and energy efficient inner-product processor for serial-link bus architecture

by Meher, Manas Ranjan, Jong, Ching Chuen, Chang, Chip Hong
Published 2013

A fast and compact circuit for integer square root computation based on Mitchell logarithmic method

by Low, Joshua Yung Lih, Jong, Ching Chuen, Low, Jeremy Yung Shern, Tay, Thian Fatt, Chang, Chip Hong
Published 2013

A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion

by Tang, Howard, Low, Joshua Yung Lih, Low, Jeremy Yung Shern, Siek, Liter, Jong, Ching Chuen, Chang, Chip Hong
Published 2013

Yield and test time management

by Wang, Nan
Published 2016

Development of a Verilog HDL model for 8051 microcontroller

by Wu, Baichuan
Published 2022