An area and energy efficient inner-product processor for serial-link bus architecture

• Main Authors: Meher, Manas Ranjan, Jong, Ching Chuen, Chang, Chip Hong
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2013
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/95905; http://hdl.handle.net/10220/11317
• Institution: Nanyang Technological University

A unique word-serial inner-product processor architecture is proposed to capitalize on the high-speed serial-link bus. To eliminate the input buffers and deserializers, partial products are generated immediately from the serial input data and accumulated by an array of small binary counters operatin...