A 60GHz on-chip antenna in standard CMOS silicon technology
This paper presents a compact and efficient 60-GHz on chip antenna that may be realized with the back-end-of-line process of standard CMOS silicon Technology on low resistivity 10 Ω.cm silicon substrate. A planar tab monopole antenna structure is adopted and the feeding network is designed with 50Ω...
Saved in:
Main Authors: | , , , |
---|---|
其他作者: | |
格式: | Conference or Workshop Item |
語言: | English |
出版: |
2013
|
主題: | |
在線閱讀: | https://hdl.handle.net/10356/101570 http://hdl.handle.net/10220/16333 |
標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|
機構: | Nanyang Technological University |
語言: | English |