A new approach to the design of efficient residue generators for arbitrary moduli

• Main Authors: Low, Jeremy Yung Shern, Chang, Chip Hong
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2013
• 主題: DRNTU::Engineering::Electrical and electronic engineering
• 在線閱讀: https://hdl.handle.net/10356/101891; http://hdl.handle.net/10220/16797
• 機構: Nanyang Technological University

Recent analyses demonstrate that operations in some bases of Residue Number System (RNS) exhibit higher resiliency to process variations than in normal binary number system. Under this premise, arbitrary moduli offer greater flexibility in forming high cardinality balanced RNS with variation-insensitive small residue operations for a given dynamic range. Limited in number theoretic property, converting an integer into residue for an arbitrary modulus is as difficult as complex arithmetic operation, particularly for very large wordlength ratio of integer to modulus. This paper presents a new design of efficient residue generators and the design approach is demonstrated with large input wordlength of 64 bits for arbitrary moduli of up to 6 bits. The proposed design eliminates the bottleneck carry propagation additions and modular adder tree of existing designs, and circumvents the undesirably high architectural disparity for different moduli of inconsistent cyclic periodicity. Our experimental results on moduli of different periodicities show that the proposed design is on average 27.7% faster and 28.7% smaller than the state-of-the-art residue generator. Our power simulation results also show that the proposed residue generator has on average reduced the total power and the leakage power of the latter by 44.5% and 24.7%, respectively.