Variability-aware parametric yield estimation for analog/mixed-signal circuits : concepts, algorithms, and challenges
With technology scaling down to 90nm and below, process variation has become a primary challenge for both design and fabrication of analog/mixed-signal circuits due to significantly increased circuit failures and yield loss. As a result, it is urgently required to estimate the yield of one design ef...
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| Main Authors: | , , , |
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| Other Authors: | |
| Format: | Article |
| Language: | English |
| Published: |
2015
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/102890 http://hdl.handle.net/10220/25713 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | With technology scaling down to 90nm and below, process variation has become a primary challenge for both design and fabrication of analog/mixed-signal circuits due to significantly increased circuit failures and yield loss. As a result, it is urgently required to estimate the yield of one design efficiently in the presence of process variation. In this paper, we present the recent advance for yield estimation for analog/mixed-signal circuits with a number of critical topics and techniques discussed and classified into two categories. The first is performance domain method, which requires extensive Monte Carlo simulations; and the second is parameter domain method, which requires the characterization of yield boundary defined by performance constraints without using Monte Carlo. We review the pros and cons of these methods, which are evaluated by a number of circuit examples with quantitative comparison. |
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