A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS

• Main Authors: Kumar, Thangarasu Bharatha, Ma, Kaixue, Yeo, Kiat Seng
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2015
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Antennas, wave guides, microwaves, radar, radio
• Online Access: https://hdl.handle.net/10356/107104; http://hdl.handle.net/10220/25299; http://dx.doi.org/10.1109/LMWC.2014.2361676
• Institution: Nanyang Technological University

This letter presents a compact CMOS based variable gain amplifier with 60 dB gain control range and a feedback reconfigurable dc offset cancellation. The design is a four-stage fully differential cascaded amplifier implemented using a 65 nm CMOS process. The amplifier achieves a current controllable gain range from -39.4 dB to +20.2 dB, a voltage tunable lower cutoff frequency from dc to 200 kHz, a consistent 3 dB bandwidth better than 4 GHz, a maximum dc power consumption of 26 mW, a measured in-band group delay variation of 20 ps, and a noise figure from 10 to 27 dB. The proposed VGA design occupies a compact die area of only 75 μm × 80 μm (excluding pads for measurement).